Pt1420 Unit 1 Assignment 1

To add new instructions to an existing instruction set or to encode many
instructions in short instruction words, processor designers reuse
opcode patterns. More specifically, when parameter field $f$ of
instruction $I$ does not take specific bit string $s$, new
instructions $I'_1, I'_2,...$, whose field $f$ has constant bit
string $s$, are added using the same opcode pattern as for instruction
$I$. For example, an irregular instruction set that has extended
instructions based on the instruction set in Table \ref{tbl:table} is
presented in Table \ref{tbl:table2}. Table
\ref{tbl:table2}'s exclusion condition column means that if one of the exclusion conditions is
satisfied by an instruction word, that instruction word is not an instance
of

the entry's instruction. The instruction set in Table
\ref{tbl:table2} includes instructions E, F, and G. Instructions E
and F were added using specific bit strings 01 and 10 (Bit 0-1)
that field-c of instruction A does not take when
field-a equals 00. Similarly, instruction G is added using
bit string 11 (Bit 4-5) that field-a of instructions A and B
does not take.

\setlength{\tabcolsep}{0.8mm}
\begin{table}[tb]
\begin{center}
\caption{Example of irregular instruction set}\label{tbl:table2}
\vspace*{-0.2cm}
\footnotesize
\begin{tabular}{|c|c|c|c|c|c|c|c|c|c|l|}\hline
\rule{0pt}{2.3mm}Instruction&7&6&5&4&3&2&1&0&Pattern&Exclusion Condition\\\hline \hline
\rule{0pt}{2.3mm}A&0&0&\multicolumn{2}{c|}{a}&\multicolumn{2}{c|}{b}&\multicolumn{2}{c|}{c}&$00\verb|------|$&$a=00
\rule{0pt}{2.3mm} \land c \neq 00 \land c \neq 11$\\
\rule{0pt}{2.3mm}&&&\multicolumn{2}{c|}{}&\multicolumn{2}{c|}{}&\multicolumn{2}{c|}{}&&$a=11$\\\hline
\rule{0pt}{2.3mm}B&0&1&\multicolumn{2}{c|}{a}&\multicolumn{2}{c|}{b}&\multicolumn{2}{c|}{c}&$01\verb|------|$&$a=11$\\\hline
\rule{0pt}{2.3mm}C&1&0&\multicolumn{2}{c|}{a}&\multicolumn{2}{c|}{b}&0&0&$10\verb|----|00$&\\\hline
\rule{0pt}{2.3mm}D&1&0&\multicolumn{2}{c|}{a}&\multicolumn{2}{c|}{b}&0&1&$10\verb|----|01$&\\\hline
\rule{0pt}{2.3mm}E&0&0&0&0&\multicolumn{2}{c|}{b}&0&1&$0000\verb|--|01$&\\\hline
\rule{0pt}{2.3mm}F&0&0&0&0&\multicolumn{2}{c|}{b}&1&0&$0000\verb|--|10$&\\\hline
\rule{0pt}{2.3mm}G&0&f&1&1&\multicolumn{2}{c|}{b}&\multicolumn{2}{c|}{c}&$0\verb|-|11\verb|----|$&\\\hline
\end{tabular}

% \includegraphics[scale=0.71]{table2.eps}
\vspace*{-0.6cm}
\end{center}
\end{table}

An instruction set is irregular when Equation \ref{eq:irr} is
satisfied:
\begin{equation} \label{eq:irr}
\exists (p_d, l_d) \in D,\ (p_e, l_e) \in D\ (l_d \ne l_e)\:\ match(p_d, p_e)
\end{equation}
Equation \ref{eq:irr} means that there is more than one decoding entry
whose opcode pattern is matched by bit string $b \in B$.

For example, in
the instruction set presented in Table \ref{tbl:table2}, bit string
$01110000$ matches the opcode patterns of instructions B and G.

We extend a decoding entry to triplet $(p_o, l, C_e)$ so that each entry
consists not only of pattern $p_o$ and label $l$ but also exclusion
condition set $C_e$. If a bit pattern satisfies one of the exclusion
conditions, even if the bit pattern matches the opcode pattern, the bit
string does not match the decoding entry. An element of the exclusion
condition set is pair $(p_m, P_u)$, where $p_m$ is a matching pattern
and $P_u$ is a set of unmatching patterns. As an example, the exclusion
condition set of instruction A in Table \ref{tbl:table2} is
$\{(\verb|--|00\verb|----|, \{(\verb|------|00), (\verb|------|01)\}),
(\verb|--|11\verb|----|, \emptyset)\}$. In an exclusion condition set,
matching condition a=11 is represented by matching

pattern
$\verb|--|00\verb|----|$, and other conditions are represented in
similar ways.

Note that one or more matching conditions is represented
by a single matching pattern. For example, matching conditions a==11
$\land$ c==11 would be represented by matching pattern
\verb|--|11\verb|--|11.

The satisfaction of the exclusion condition is checked by
\begin{equation}\label{eqn:exclusions}
\bigvee_{(p_m, P_u) \in C_e}(b \in p_m \land \bigwedge_{p_u
\in P_u} b \notin p_u)
\end{equation}
For example, bit string $00000001$ matches both the A and E patterns, but it satisfies one of the exclusion conditions of
instruction A: $00000001 \in \verb|--|00\verb|----|\ \land\ 00000001
\notin \verb|------|00\ \land\ 00000001 \notin \verb|------|11$;
bit string $00000001$ is not an instance of instruction A but of
instruction

E.