Vertical design of double gate silicon carbide (3C-SiC) MESFET on silicon (Si) substrate
ABSTRCT
There is big deal of interest in silicon carbide (SiC) as an electronic material for high-voltage, high-power and high temperature applications. In this thesis, characteristics of Double gate vertical metal semiconductor field effect transistors (MESFET) fabricated on N/N+ 3C-SiC grown on N+ Si substrate are reported. The most intriguing electronic property of silicon carbide is that it is the only semiconductor material other than silicon that can have electronically passivated surface to industrial standards. The surface passivation is the main reason for the dominance of silicon but, in addition to that, silicon carbide has superior bulk properties. This combination of factors raises the question whether silicon carbide can play a role in main stream electronics (integrated-circuit based complex systems). After analysis of both technical and commercial factors and challenges leads to a conclusion that developing a silicon-carbide film on silicon wafers is the most promising way for silicon carbide enter the mainstream electronics. SiC MESFET shows great promise in high power/temperature operations when compared to Si counter parts. The simulations were performed on ATLAS (SILVACO) software, and results are presented.
INTRODUCTION
Silicon carbide (SiC) devices have received increased attention for high power, high speed, high temperature applications due to their superior properties, including wide band gap, high saturated electron velocity, high breakdown electric field strength, and high thermal conductivity. The high breakdown field allows SiC devices to operate at much higher voltages than Si or GaAs devices and...
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...ltage at 750K
Fig 16 Drain voltage Vs Drain current curves at 750K
Fig 17 Break down voltage at 750K
Fig 18 Threshold voltage at 750K
Fig 19 Drain voltage Vs Drain current curves at 900K
Fig 20 Break Down voltage at 900K
Fig 21 Temperature Vs Threshold voltage
Fig 22 Temperature Vs Drain current
Fig 23Temperature Vs Break Down voltage
Fig 24 Threshold voltage Vs Gate length
Fig 25 Drain current Vs Gate length
Fig 26 Break Down Voltage Vs Gate length
Fig 27 Threshold voltage Vs Doping Concentration
Fig 28 Drain Current Vs Doping Concentration
Fig 29 Break Down voltage Vs Doping Concentration
CONULSION:
The double gate vertical (3C-SiC) MESFET designed on silicon (Si) substrate has designed on ATLAS which has drain current (ID) = 0.7mA and threshold voltage Vt = -6V.
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