Networking and Telecommunications


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As technology scales, Systems-on-Chips (SoCs) are becoming increasingly complex and heterogeneous. One of the most important key issues that characterize such SoCs is the seamless mixing of numerous Intellectual Property (IP) cores performing different functions and operating at different clock frequencies. In just the last few years, Network-on-Chip (NoC) has emerged as a leading paradigm for the synthesis of multi-core SoCs [1]. The routing algorithm used in the interconnection communication NoC is the most crucial aspect that distinguishes various proposed NoC architectures [2], [3]. However, the use of VCs introduces some overhead in terms of both additional resources and mechanisms for their management [4].
Each IP core has two segments to operate in communication and computation modes separately [5]. On-chip packet switched interconnection architectures, called as NoCs, have been proposed as a solution for the communication challenges in these networks [6]. NoCs relate closely to interconnection networks for high-performance parallel computers with multiple processors, in which each processor is an individual chip.
A NoC is a group of routers and switches that are connected to each other on a point to point short link to provide a communication backbone of the IP cores of a SoC. The most common template that proposed for the communication of NoC is a 2-D mesh network topology where each resource is connected with a router [7]. In these networks, source nodes (an IP-Core), generate packets that include headers as well as data, then routers transfer them through connected links to destination nodes [8].
The wormhole (WH) switching technique proposed by Dally and Seitz [9] has been widely used in the interconnections such as [10], [11]. In the WH technique, a packet is divided into a series of fixed-size parts of data, called flits. Wormhole routing requires the least buffering (flits instead of packets) and allows low-latency communication. To avoid deadlocks among messages, multiple virtual channels (VC) are simulated on each physical link [12]. Each unidirectional virtual channel is realized by an independently managed pair of message buffers [13].
This paper presents a new routing algorithm for irregular mesh networks by base that enhances a previously proposed technique. The primary distinction between the previous method and the method presented in this paper is passing messages from ONs in the network. Simulation results show that utilization of network by e-xy and OAPR algorithm is worse than the improved one, i-xy. We have been simulated every three algorithms for 5% and 10% of oversized nodes with uniform and hotspot traffic.

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Results for all situations show that our algorithm has higher utilization and can work in higher message injection rates, with higher saturation point.
The rest of the paper is organized as follows. In section II some deterministic-based routing algorithms are discussed. Then the new i-xy irregular routing algorithm is explained followed by Section III in which our experimental results are discussed. Finally, Section IV summarizes and concludes the work.
2 Irregular Routing
Routing is the act of passing on data from one node to another in a given scheme [11]. Currently, most of the proposed algorithms for routing in NoCs are based upon deterministic routing algorithms which in the case of oversized nodes, cannot route packets. Since adaptive algorithms are very complex for Network-on-Chips, a flexible deterministic algorithm is a suitable one [14]. Deterministic routing algorithms establish the path as a function of the destination address, always applying the same path between every pair of nodes. This routing algorithm is known as dimension-order routing (x-y routing). This routing algorithm routes packets by crossing dimensions in strictly increasing (or decreasing) order, reducing to zero the offset in one dimension before routing in the next one [13]. To avoid deadlocks among messages, multiple virtual channels (VC) are simulated on each physical channel [12]. But in this paper, we use no VCs in proposed algorithm and introduced a deadlock and live lock-free irregular routing algorithm.
Many algorithms have been suggested to operate in faulty conditions without deadlock and livelock. We can modify these algorithms to use in irregular interconnection networks. Some of these algorithms like [10], [11], [15] and [16] are based on deterministic algorithms. In [15], Wu proposed a deterministic algorithm. This proposed algorithm uses odd-even turn model to pass the block faults. Also, the algorithm proposed by Lin et al. [17] uses above mentioned method. Since our proposed algorithm is similar to these algorithms (uses no virtual channel), in the next section, we are going to describe how these deterministic algorithms work and how we have improved them. The main idea describes in the rest of this section.



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