Low-Voltage Current-Tmode Realization of Digital Logic Gates Using CMOS

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Low-Voltage Current-Mode Realization of Digital Logic Gates using CMOS
In this paper a new technique is introduced for implementing the basic logic function by using analog current-mode techniques. By expanding the logic function in power series expression, and using adder and sub-tractor realization of the basic logic function is simplified. To illustrate the proposed technique, a CMOS circuit for simultaneous realization of the logic function NOT, AND, OR, NAND and XOR is considered. PSPICE simulation results, obtained with ±2V supply, are included.

Key Word: Current Mirror; CMOS analog multiplier; Current mode; Translinear principle; Digital logic circuits;
INTRODUCTION
The current-mode implementation of logic gates is a very important for current mode analog signal processing system. Mixed analog/digital electronic circuits are becoming increasingly important. Digital electronic circuits are mostly designed in CMOS technology. To be able to integrate the digital and analog parts on to one chip, high performance analog CMOS circuits are required (Ismail and Fiez, 1994) and a large number of mixed analog/digital VLSI integrated circuits realized in state-of-the-art digital CMOS technologies are now available (Laker and Sansen, 1994).
In fact the emergence of ICs incorporating mixed analog and digital functions on a single chip has led to an advanced level of analog design (Toumazou et al., 1990). Of particular interest here is the current-mode approach for designing analog ICs. It is well known that current-mode analog signal processing offers some important speed advantages over the traditional voltage-mode signal processing (Allen, 1990). At present current-mode implementations are available for a wide range of analog elect...

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